5 24, 2024
HUSB363 is designed for a USB Type-C PD Source product. It can support up to multiple PDOs with programmable voltage and current for different applications, such as PPS PDOs. All of PDOs are fully compliant with USB PD 3.1 Specification Rev.1.8. Besides, HUSB363 implements DPDM charging protocols. Both D+ and D- pins can be configured to support QC2.0, QC3.0, AFC, FCP, SCP, UFCS and divider 3 mode which provide excellent compatibility for the legacy devices. It integrates an GATE driver to enable the VBUS from VIN to protect the devices connected with Type-C connector. The high voltage tolerance and protections at CC1, CC2, D+ and D- pins provide more reliability for the system.
Figure 1: HUSB363 demo and QFN-16L / QFN-24L package drawing
FEATURES
USB Type-C PD Source with PPS Supported
– Compliant with USB Type-C Specification Reversion 2.1
– Compliant with USB PD Specification Reversion 3.1
Integrated VCONN Power for eMarker Detection
Integrated high voltage driver for N-MOSFET
Multiple DPDM Charging Protocols Implemented
– BC1.2 DCP and Divider 3
– QC2.0, QC3.0, AFC, FCP, SCP, UFCS
Up to 30 V Maximum Voltage Rating at USB Type-C Connector Pins
Programmable Constant Voltage and Constant Current Control
Fault Protections including Over-Voltage Protection, Over-Current Protection, Short Circuitry Protection, Over-Temperature Protection, Under-Voltage Protection, CC OverVoltage Protection, DPDM Over-Voltage Protection, Thermal Shut Down
Integrated MCU with MTP Memory
±1500 V HBM ESD Rating for all of Type-C Connector Pins
Figure 2: Typical Application Circuit Diagram of HUSB363
HUSB363 is available in QFN-24L and QFN-16L packages. In the face of the latest PD3.1 standard, when the original PD system needs to upgrade its performance, HUSB363 is pin-compatible with Wisers Semiconductor's previous products, making it easy and fast to realize system upgrades.
Figure 3: Package and Pin Definition Diagram for HUSB363
Low Power Consumption And High Performance
The HUSB363 integrates the latest power management algorithms and efficient power transfer protocols to ensure fast charging while minimizing overall energy consumption. The chip has an extremely low quiescent current in standby mode, which effectively reduces energy consumption during idle time.
Comprehensive software support
1. Protocol upgrades can be compatible with new protocols through the FW upgrade, but also through the FW upgrade compatible with different cell phones and computers and other devices
2. GPIO can be used as ADC input sampling analog signals, according to the protocol or output voltage and current to do external control signals (such as LED lights, external circuits, etc.)
3. FW can control some specific protocol timing or control timing.